Tuesday 28 June, 2016
- Fix for footprint reference not visible in part builder.
- Improved editing of schematic buses.
- Add a Bus optimizer.
Monday 27 June, 2016
- Minor fix for importing Eagle 7 files with buses.
- Fix for pad holes sizes importing Eagle files.
Wednesday 22 June, 2016
- Changing footprint style in the part builder from a library type, now updated all displays.
Monday 20 June, 2016
- Step and repeat for drill files now done, compatible with Gerber step and repeat.
Sunday 19 June, 2016
- Fix for quad devices pin spacing in 3D.
Friday 17 June, 2016
- Several minor bug fixes.
- Improved routing for small track segments.
- Add capacitor dialog remembers settings.
Wednesday 15 June, 2016
- Fixed castellated PCB NC drill output.
- Fix for rounded SMT pads appearing on both layer in 3D if placed on bottom.
Tuesday 14 June, 2016
- Improved castellated PCB part.Gerber output and Drill file fixed.
Monday 13 June, 2016
- Improved silkscreen textures in 3D.
- Improved PCB textures on the edge of the board.
- Castellated parametric PCB part works with pads with non-rounded corners.
Sunday 12 June, 2016
- Added texture mapping mode selection to the part builder.
Saturday 11 June, 2016
- Added option for gold plate on all pads and vias.
- Added new castellated PCB part to the part builder. This adds pads on the edges with holes offset to the edge. DRC OK for these.
Wednesday 8 June, 2016
- Finer picking for the placement point.
- Lines, arcs, ellipses, circles, rectangles, polylines, polygons, text, noteboxes, curves and closed curves now show in 3D as 3D copper if on the top or bottom layer.
Sunday 5 June, 2016
- Fix for smart pan in footprints sometimes not working.
- All parametric parts can now have rounded outer/inner rectangular pads (where sensible)
- Recover now shows your local date/time.
- Splash-screen and the about box now shows your local time for build.
Friday 3 June, 2016
- Fix for poor quality arcs.
- Added properties to pads and part builder for rounded pad corners on just one side.
- Improved position of silkscreen rectangle in DIPs, and SOICs.